Symm V-Max Overview with Enginuity Overview Session

Below are my notes from the Symm V-Max Overview with Enginuity Overview session, please excuse any typographical errors as I posted this as quickly as possible.  If you see any content errors or missing information please comment.

  • Symm V-Max and V-Max SE
    • Distributed Global Memory
  • Symm V-Max Configuration Overview
    • 1 – 8 V-Max Engines
    • Up to 128 FC FE Ports
    • Up to 64 FiCON FE Ports
    • Up to 64 gigE FE Ports
    • Up to 1 TB of Mem
    • Up to 10 Storage Bays
    • 96-2400 Drives
    • Up to 2 PB of total capacity
  • Director Boards Populated from 1 – 16 bottom to top
  • Engines are populated from inside out
  • Symm V-Max SE
    • Singe V-Max Engine (Engine 4)
    • Up to 16 FC FE Ports
    • Up to 8 FiCON FE Ports
    • Up to 8 gigE FE Ports
    • Up to 128 GB of Mem
    • Upto 120 Drives
  • V-Max Engine Overview
    • 2 Director Boards
    • Redundant PS, battery, fans, etc…
    • FA and DA on V-Max Engine
    • Backend I/O module supports up to 4 DAEs
      • 4 Backend I/O modules will support up to 8 DAEs in a redundant configuration
    • EFD support for  200 and 400 GB drives
  • FC I/O modules, FiCON I/O module, iSCSI/gigE I/O module
  • Memory Config
    • 32GB, 64GB, 128GB options
    • Memory can be configured by adding memory to a existing V-Max engine or adding additional V-Max engines
    • Memory is mirrored across V-Max engines for improved availability
  • Hard to show the picture I am looking at but the rear of the V-Max engine chassis has the following ports
    • Virtual Matrix interfaces
    • Backend I/O modules interfaces
    • Front End I/O modules interfaces
  • Symm V-Max Matrix Interface Board Enclosure (MIBE)
  • Each V-Max Engines can be directly connected to 8 DAEs
    • Depending on the configuration up to two additional DAEs can be daisy chained beyond the primary DAE
  • V-Max provides 2x the ability to connect directly to drive bays over the DMX, from 64 drive loops to 128 drive loops
  • I/O Flow
    • Director board has 2 quad core procs
    • CPUs are mapped as A-H slices
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